;-------------------------------------------------------------------------- ; ; ; PEEDI target configuration file for PXA270 processor ; ; Ronetix ; ; Supported devices : PXA270 ; ; Board : Custom board, NAND FLASH is wired considering ; Intel recommendations. ; ; Revision : 1.0 ; ; Date : Nov 20, 2006 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = XScale ; platform is XScale [PLATFORM_XSCALE] JTAG_CHAIN = 7 ; list of IR length of all TAP controller in JTAG chain JTAG_CLOCK = 1000, 16000 ; JTAG Clock in [kHz] - 1MHz JTAG clock for init ; operations and 16MHz for normal work TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET WAKEUP_TIME = 20 TIME_AFTER_RESET = 500 CORE0 = XScale, 0 ; TAP is XSCALE CPU CORE0_STARTUP_MODE = RESET ; Stop core CORE0_BREAKMODE = soft ; breakpoint mode: CORE0_INIT = INIT_CPU ; init section for board CORE0_FLASH0 = FLASH_28F320J3D ; flash section parameters CORE0_FLASH1 = FLASH_NAND ; NAND Flash section CORE0_ENDIAN = LITTLE ; core is little endian CORE0_WORKSPACE_ADDR = 0xA0001000 ; start address of workspace for ; flash programmer CORE0_WORKSPACE_LEN = 0x10000 ; length of workspace in bytes CORE0_DEBUG_HANDLER_ADDR= 0xFE000000 ; debug handler base address CORE0_VECTOR_CATCH_MASK = 0x00 ; catch data abort exceptions CORE0_VECTOR_UNDEF = AUTO CORE0_VECTOR_SWI = AUTO CORE0_VECTOR_PABORT = AUTO CORE0_VECTOR_DABORT = AUTO CORE0_VECTOR_RES = AUTO CORE0_VECTOR_IRQ = AUTO CORE0_VECTOR_FIQ = AUTO CORE0_RELOCATED_UNDEF = AUTO CORE0_RELOCATED_SWI = AUTO CORE0_RELOCATED_PABORT = AUTO CORE0_RELOCATED_DABORT = AUTO CORE0_RELOCATED_RES = AUTO CORE0_RELOCATED_IRQ = AUTO CORE0_RELOCATED_FIQ = AUTO CORE0_FILE = "myfile.bin", BIN, 0x00400000 ; default file CORE0_PATH = "tftp://192.168.1.1" ; default path [INIT_CPU] memory write 0x48000008 0x18EA98EA ; MSC0 = 0x18Ea98Ea memory read 0x48000008 memory write 0x4800000C 0x000018E4 ; MSC1 = 0x000018e4 memory read 0x4800000C memory write 0x48000010 0x7FF0FFF4 ; MSC2 = 0x00000000 memory read 0x48000010 memory write 0x48000014 0x00000003 ; MECR = 0x00000003 - 2 slots memory read 0x48000014 memory write 0x48000028 0x00014307 ; MCMEM0 = 0x00014307 memory read 0x48000028 memory write 0x4800002C 0x00014307 ; MCMEM1 = 0x00014307 memory read 0x4800002C memory write 0x48000030 0x0001C787 ; MCATT0 = 0x0001c787 memory read 0x48000030 memory write 0x48000034 0x0001C787 ; MCATT1 = 0x0001c787 memory read 0x48000034 memory write 0x48000038 0x0001430F ; MCIO0 = 0x0001430F memory read 0x48000038 memory write 0x4800003C 0x0001430F ; MCIO1 = 0x0001430F memory read 0x4800003C memory write 0x48000020 0x00010001 ; FLYXNFG = 0x00010001 memory read 0x48000020 memory write 0x48000004 0x23CA401E ; MDREFR = 0x23CA401E memory read 0x48000004 memory write 0x48000004 0x23CA201E ; MDREFR = 0x20CA201E memory read 0x48000004 memory write 0x4800001C 0x40044004 ; SXCNFG = 0x40044004 memory read 0x4800001C memory write 0x48000004 0x23CA201E ; MDREFR = 0x204B201E memory read 0x48000004 memory write 0x48000004 0x200B201E ; MDREFR = 0x200B201E wait 10 memory read 0x48000004 ; read MDREFR memory write 0x48000004 0x2013A01E ; MDREFR = 0x200B201E wait 10 memory read 0x48000004 ; read MDREFR memory write 0x48000000 0x010009C9 ; MDCNFG = 0x010009C9 wait 10 memory read 0x48000000 ; read MDCNFG memory read 0xA0000000 64 memory write 0x48000000 0x010009C9 ; MDCNFG = 0x010009C9 wait 10 memory read 0x48000000 ; read MDCNFG mem write 0x48000040 0x00220022 ; MDMRS = 0x00220022 wait 10 memory write 0x4010000C 0x0 memory write 0x40100004 0x0 memory write 0x4010000C 0x80 memory write 0x40100000 0x18 memory write 0x40100004 0x0 memory write 0x4010000C 0x0 memory write 0x4010000C 0x3 memory write 0x40100008 0x1 memory write 0x40100008 0x7 memory write 0x40100004 0x0 memory write 0x40100010 0x0 memory write 0x40100004 0x40 ; Set up GPIO pins mem write 0x40E00018 0x00018004 ; GPSR0 - GPIO Pin Output Set Register GPIO<31:0> mem write 0x40E0001C 0x004F0080 ; GPSR1 - GPIO Pin Output Set Register GPIO<63:32> mem write 0x40E00020 0x13EFC000 ; GPSR2 - GPIO Pin Output Set Register GPIO<80:64> mem write 0x40E00118 0x0006E032 ; GPSR3 - GPIO Pin Output Set Register GPIO<127:96> mem write 0x40E00024 0x084AFE1A ; GPCR0 - GPIO Pin Output Clear Register GPIO<31:0> mem write 0x40E00028 0x003003F2 ; GPCR1 - GPIO Pin Output Clear Register GPIO<63:32> mem write 0x40E0002C 0x0C014000 ; GPCR2 - GPIO Pin Output Clear Register GPIO <80:64> mem write 0x40E00124 0x00000C00 ; GPCR2 - GPIO Pin Output Clear Register GPIO <127:96> mem write 0x40E0000C 0xCBC3BFFC ; GPDR0 - GPIO Pin Direction Register GPIO<31:0> mem write 0x40E00010 0x00FFABF3 ; GPDR1 - GPIO Pin Direction Register GPIO<63:32> mem write 0x40E00014 0x1EEFFC00 ; GPDR2 - GPIO Pin Direction Register GPIO<80:64> mem write 0x40E0010C 0x0187EC32 ; GPDR3 - GPIO Pin Direction Register GPIO<127:96> mem write 0x40E00054 0x84400000 ; GAFR0_L - GPIO Alternate Function Select Register GPIO<15:0> mem write 0x40E00058 0xA51A8010 ; GAFR0_U - GPIO Alternate Function Select Register GPIO<31:16> mem write 0x40E0005C 0x699A955A ; GAFR1_L - GPIO Alternate Function Select Register GPIO<47:32> mem write 0x40E00060 0x0005A0AA ; GAFR1_U - GPIO Alternate Function Select Register GPIO<63:48> mem write 0x40E00064 0x40000000 ; GAFR2_L - GPIO Alternate Function Select Register GPIO<79:64> mem write 0x40E00068 0x0109A400 ; GAFR2_U - GPIO Alternate Function Select Register GPIO 80 mem write 0x40E0006C 0x54000000 ; GAFR3_L - GPIO Alternate Function Select Register GPIO<111:96> mem write 0x40E00070 0x00001409 ; GAFR3_U - GPIO Alternate Function Select Register GPIO<127:112> mem write 0x40F00004 0x20 ; PSSR - Power Manager Sleep Status Register [FLASH_28F320J3D] CHIP = 28F320J3 ; flash chip ACCESS_METHOD = AGENT ; program method auto CHECK_ID = YES ; check chip ID CHIP_WIDTH = 16 ; chip is in 16 bit configuration CHIP_COUNT = 1 ; one chip is used BASE_ADDR = 0 ; chip is mapped at 0x0000000 FILE = "tftp:u-boot.bin", BIN, 0 ; file to program AUTO_ERASE = YES ; erase before program AUTO_LOCK = NO ; lock after program [FLASH_NAND] CHIP = NAND_FLASH DATA_BASE = 0x20000000 ; data CMD_BASE = 0x30000000 ; commands (CLE) ADDR_BASE = 0x20100000 ; addreses (ALE) ;FILE = "tftp:jffs2_image.bin", BIN, 0 ; do not use TFTP if the file > 32MB FILE = "ftp://user:password@192.168.3.1/jffs2_image.bin", BIN, 0 ; list with bad blocks to be marked as bad ;========================================= ;BAD_BLOCKS=62 ; CAUTION!!! ; Enable erasing of bad blocks ; DO NOT Enable this if you don't know what you are doing ; For more information see the AN006 (www.ronetix.at/an006.html) ;ERASE_BAD_BLOCKS = YES OOB_INFO = JFFS2 ; how to deal with the oob (spare) info ; RAW - program 528/2112 bytes from file ; JFFS2 - program 512/2048 bytes from file and add ECC bytes ; FF - program 512/2048 bytes from file, the spare info is 0xFF [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 ; enable CLI over RS232 ;TCP_PORT = 2023 ; enable serial over TCP/IP [TELNET] PROMPT = "pxa270> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog [erase] ; erase flash flash erase [prog] ; program flash flash program