;-------------------------------------------------------------------------------
;
;                                   mpc5675k.cfg
;                                   ------------
;
;           PEEDI target configuration file for Freescale MPC5675K
;
;
;   Supported devices   : Freescale MPC5675K
;						  BookE mode is supported
;						  VLE mode is not supported
;
;   Board       		: Axiom CMM-MPC5675K
;
;   Revision            : 2.0
;
;   Date                : Nov 24, 2017
;
;-------------------------------------------------------------------------------

;-------------------------------------------------------------------------------
; The following section contains licenses that are required for PEEDI to oprate.
;
; These licenses must be filled before using this file.
;
;   Example:
;       [LICENSE]
;       KEY         = UPDATE_24MAY2007, 1111-1111-1111-1
;       KEY         = ARM7,             2222-2222-2222-2
;
; The minimum reqired licenses are provided when PEEDI is purchased and are printed
; on the bottom side of PEEDI.
;
; The license keys for one or more PEEDIs can be loaded from an external file
; FILE = tftp://192.168.3.1/licenses.txt
;

[LICENSE]
FILE = eep://license.txt

;-------------------------------------------------------------------------------

[DEBUGGER]
PROTOCOL                = gdb_remote    ; gdb remote
REMOTE_PORT             = 2000          ; TCP/IP port

[TARGET]
PLATFORM                = MPC5500

[PLATFORM_MPC5500]
JTAG_CHAIN              = 10, 10        ; list of IR lenght of all TAP controller in JTAG chain
MPC5XXX_AUX_TAP_CMD 	= 5, 0x1C		; 0x11 - core0, 0x19 - core1, 0x1C - both cores
JTAG_CLOCK              = 1000, 12000   ; JTAG Clock in [kHz] - 10kHz jtag clock for init operations and 16MHz for normal work
TRST_TYPE               = PUSHPULL      ; type of TRST (JCOMP) output: OPENDRAIN or PUSHPULL
RESET_TIME              = 20            ; lenght of RESET pulse in ms; 0 means no RESET
TIME_AFTER_RESET 		= 50

CORE0                   = MPC5XXX_BOOKE	; Force use of BookE
CORE0_STARTUP_MODE      = RESET
CORE0_BREAKMODE         = HARD          ; breakpoint mode:
                                        ; soft - software breakpiont
                                        ; hard - use hardware breakpoints instead of software
CORE0_INIT              = INIT_MPC5675K ; init section
CORE0_FLASH0            = FLASH_MPC     ; flash section parameters
CORE0_ENDIAN            = BIG           ; core is big endian
CORE0_WORKSPACE_ADDR    = 0x40000000    ; start address of workspace for flash programmer
CORE0_WORKSPACE_LEN     = 0x10000       ; length of workspace in bytes
CORE0_FILE              = "http://test.bin"
CORE0_PATH              = "tftp://192.168.3.60"

[INIT_MPC5675K]
; Set up MMU to put internal Flash at 0x0
; Virtual address 0x0 -> Physical address = $0000_0000
; TLB_1 0, 16 MByte Memory Space, Not Guarded, Don't Cache, All Access
echo Set up MMU to put internal Flash at 0
set MAS0 0x10000000
set MAS1 0xC0000700
set MAS2 0x00000020
set MAS3 0x0000003F
exec 0x7C0007A4 ; tlbwe

; Set up MMU for External Memory
; Base address = 0x2000_0000
; TLB_1 1, 512 MByte Memory Space, Not Guarded, Cachable, All Access, BookE
set MAS0 0x10010000
set MAS1 0xC0000980
set MAS2 0x20000020
set MAS3 0x2000003F
exec 0x7C0007A4 ; tlbwe

; Set up MMU for Internal SRAM
; Base address = $4000_0000
; TLB_1 2, 256 KByte Memory Space, Not Guarded, Don't Cache, All Access
echo Set up MMU for Internal SRAM 0x40000000
set MAS0 0x10020000
set MAS1 0xC0000400
set MAS2 0x40000008				; BOOKE
set MAS3 0x4000003F
exec 0x7C0007A4 ; tlbwe

; Set up MMU for Internal SRAM
; Base address = $5000_0000
; TLB_1 3, 256 KByte Memory Space, Not Guarded, Don't Cache, All Access
echo Set up MMU for Internal SRAM 0x50000000
set MAS0 0x10030000
set MAS1 0xC0000400
set MAS2 0x50000008				; BOOKE
set MAS3 0x5000003F
exec 0x7C0007A4 ; tlbwe

; Setup MMU for DPM
; Base address = $8FF0_0000
; TLB_1 4, 1 MByte Memory Space, Guarded, Don't Cache, All Access
echo Setup MMU for DPM at $8FF0_0000
set MAS0 0x10040000
set MAS1 0xC0000500
set MAS2 0x8FF00008
set MAS3 0x8FF0003F
exec 0x7C0007A4 ; tlbwe

; Set up MMU for Peripherals 
; Base address = $C3E0_0000
; TLB_1 5, 2 MByte Memory Space, Not Guarded, Don't Cache, All Access
echo Set up MMU for Peripherals at 0xC3E0_0000
set MAS0 0x10050000
set MAS1 0xC0000580
set MAS2 0xC3E00008
set MAS3 0xC3E0003F
exec 0x7C0007A4 ; tlbwe

; Set up MMU for Peripherals 
; Base address = $FFE0_0000
; TLB_1 6, 2 MByte Memory Space, Not Guarded, Don't Cache, All Access
echo Set up MMU for Peripherals at 0xFFE0_0000
set MAS0 0x10060000
set MAS1 0xC0000580
set MAS2 0xFFE00008
set MAS3 0xFFE0003F
exec 0x7C0007A4 ; tlbwe

; disable Software Watchdog
mem wr 0xfff38010 0xC520
mem wr 0xfff38010 0xD928
mem wr 0xfff38000 0xFF00010A

set IVPR  0x40001000    ; IVPR points to valid memory space

; set PLL to 31.5MHz (126MHz / 4) + LOCEN
mem wr 0xC3F80000 0x04940000
wait 50

; set PLL to 126Mhz + LOCEN
mem wr 0xC3F80000 0x04840000
wait 50

; set clock to normal to speedup RAM init
clock normal

echo Init internal RAM  at 0x40000000
mem wr64 0x40000000 0x0BADF00D0BADF00D 1024*64/8	; 64 KB


[FLASH_MPC]
CHIP        = MPC5XXX         ; internal FLASH
AGENT_MODE 	= BOOKE
FILE        = "test2m.bin", 0x0


[SERIAL]                                ; serial port configuration
BAUD                = 9600
STOP_BITS           = 1
PARITY              = NONE
TCP_PORT            = 0                 ; enable CLI over RS232
;TCP_PORT           = 2023              ; enable serial over TCP/IP

[TELNET]
PROMPT              = "mpc5675k> "      ; telnet prompt
;BACKSPACE          = 127               ; comment out for autodetect

[DISPLAY]
BRIGHTNESS          = 20                ; LED indicator brightness
VOLUME              = 25                ; zummer volume

[ACTIONS]                               ; user defined scripts
1 = erase
2 = prog

[erase]
flash erase

[prog]
flash prog