;-------------------------------------------------------------------------- ; ; ; PEEDI sample target configuration file ; ; Ronetix ; ; Supported devices : LM3S8962 ; ; Revision : 1.3 ; ; Date : December 8, 2010 ; ; The file is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = Cortex-M ; platform is Cortex-M ;PLATFORM = Cortex-M_SWD ; platform is Cortex-M [PLATFORM_Cortex-M] JTAG_CHAIN = 4 ; list of TAP controllers in the JTAG chain JTAG_CLOCK = 10, 5000 ; JTAG Clock in [kHz] TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 ; length of RESET pulse in ms; 0 means no RESET CORE0 = Cortex-M CORE0_RESET_MODE = sysresetreq ; software reset: sysresetreq (default) or vectreset CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = HARD ; breakpoint mode CORE0_INIT = INIT_LM3S CORE0_FLASH = FLASH_LM3S; FLASH section parameters CORE0_WORKSPACE = 0x20000000, 0x10000 CORE0_PATH = "tftp://192.168.3.60" ; default path [PLATFORM_Cortex-M_SWD] SWD_CLOCK = 10, 5000 ; SWD Clock in [kHz] TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 0 ; length of RESET pulse in ms; 0 means no RESET CORE0 = Cortex-M CORE0_STARTUP_MODE = RESET ; stop the core immediately after reset CORE0_RESET_MODE = sysresetreq ; software reset: sysresetreq (default) or vectreset CORE0_ENDIAN = LITTLE ; core is little endian CORE0_BREAKMODE = HARD ; breakpoint mode CORE0_INIT = INIT_LM3S CORE0_FLASH = FLASH_LM3S; FLASH section parameters CORE0_WORKSPACE = 0x20000000, 0x10000 CORE0_PATH = "tftp://192.168.3.60" ; default path [INIT_LM3S] mem wr 0x400FE0F0 1 ; map FLASH at address 0 set pc 0 ; set PC and SP to avoid gdb complaining set sp 0x2000FFFC ; when FLASH is empty [FLASH_LM3S] CHIP = LM3S ; flash chip CPU_CLOCK = 50000 ; the CPU clock is 50MHz ;ACCESS_METHOD = DIRECT ; use DIRECT programming mode ACCESS_METHOD = AGENT ; use AGENT programming mode ; 'USE_WRITE_BUFF' applicable only in DIRECT mode ; LM3S8962 doesn't have write buffer USE_WRITE_BUFF = NO ; set to YES if supported, speeds up programming more than 10 times FILE = "test32k.bin" 0 ; file to program AUTO_ERASE = NO ; erase before program [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0 [TELNET] PROMPT = "lm3s8962> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; beeper volume [ACTIONS] ; user defined scripts ;AUTORUN = 2 ; executed on every target connect 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog