;--------------------------------------------------------------------------
;
;
;	PEEDI sample target configuration file
;
;	Ronetix
;
;	Supported devices	: Atmel ATSAMV71
;
;	Revision			: 1.0
;
;	Date				: April 22, 2015
;
; The file is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;
;--------------------------------------------------------------------------

;--------------------------------------------------------------------------
; The following section contains licenses that are required for PEEDI to
; operate. These licenses must be filled before using this file.
; The [LICENSE] section may contain license keys for one or more PEEDIs.
;
;   Example:
;       [LICENSE]
;       KEY         = UPDATE_24MAY2010, 1111-1111-1111-1
;       KEY         = XXXXX, 2222-2222-2222-2
;
; The [LICENSE] section may point to an external file which contains
; license keys for one or more PEEDIs. The external file must include 
; the text [LICENSE] followed by all keys.
;
;   Example:
;		[LICENSE]
;		FILE = tftp://192.168.3.1/license.txt
;		or
;		FILE=eep:license.txt 
;		or 
;		FILE = ftp://user:password@192.168.3.1/license.txt
;
;
; PEEDI is shipped with license keys stored in "eep:license.txt" and 
; printed on a label on the bottom side of PEEDI.
;
[LICENSE]
FILE = eep://license.txt
;--------------------------------------------------------------------------

[DEBUGGER]
PROTOCOL 			= gdb_remote ; gdb remote
REMOTE_PORT			= 2000		; TCP/IP port
DROP_ON_RESET 		= NO

[TARGET]
PLATFORM            = CortexM3_SWD

[PLATFORM_CortexM3_SWD]
SWD_CLOCK           = 100, 2000 ; SWD Clock in [kHz]
RESET_TIME 		 	= 0				; length of RESET pulse in ms; 0 means no RESET
CORE0 		 		= CortexM3		; TAP is CortexM3  CPU
CORE0_STARTUP_MODE 	= RESET			; stop the core immediately after reset
CORE0_ENDIAN	 	= LITTLE 		; core is little endian
CORE0_BREAKMODE 	= HARD, 0x08000000, 0x08020000	; breakpoint mode
CORE0_WORKSPACE		= 0x20400000, 0x10000
CORE0_INIT		 	= INIT_SAMV71 	; init section
CORE0_FLASH		 	= FLASH_SAMV71	; FLASH section parameters
CORE0_PATH	= "tftp://192.168.3.1"


[INIT_SAMV71]
;set pc 0							; set PC and SP to avoid gdb complaining
;set sp 0x20004FFC					; when FLASH is empty

[INIT_ETM]
; PMC PCK: PCK Clock auf Master Clock (MCK /3)
memory w32      0x400E064C      0x00000024    ; PRES = 2 (+1); CSS = MCK(4)
memory w32      0x400E0600      0x00005F00    ; Enable PCK3 for ETM

; ----------- ITM -----------
mem wr    0xE000EDFC    0x01000000    ; Core_Debug-> DEMCR; // Enable Debug

mem wr    0xE00400F0    1         ; TPI->SPPR    en. Manchester encoding
mem wr    0xE0040304    0x100     ; TPI->FFCR    bypass formatter
mem wr    0xE0040010    0         ; TPI->ACPR    SWO prescaler 0 --> 50 MHz PCK3

mem wr    0xE0000FB0    0xC5ACCE55    ;ITM.LAR Lock Access Register    unlock access to ITM registers
mem wr    0xE0000E80    0x10009       ;ITM.TCR Trace Control trace    ID = 1, ITM and DTW enabled TXENA + ITMENA + TraceBusID=0x1
mem wr    0xE0000E40    0x0        	  ;ITM.TPR Trace Privilege Register en. all tracing ports
mem wr    0xE0000E00    0xffffffff    ;ITM.TER Trace Enable Register    en. all stimulus ports


[FLASH_SAMV71]
CHIP				= ATSAM	; flash chip
FILE				= "test32k.bin", 0x400000 ; file to program

[SERIAL] 							; serial port configuration
BAUD				= 115200
STOP_BITS			= 1
PARITY				= NONE
TCP_PORT			= 0

[TELNET]
PROMPT 				= "samv7> "		; telnet prompt
;BACKSPACE			= 127			; comment out for autodetect

[DISPLAY]
BRIGHTNESS			= 20			; LED indicator brightness
VOLUME				= 25			; beeper volume

[ACTIONS]							; user defined scripts
;AUTORUN 			= 2				; executed on every target connect
1 = erase
2 = prog

[erase]								; erase flash
flash erase

[prog]								; program flash
flash prog