;--------------------------------------------------------------------------
;
;
;   PEEDI sample target configuration file
;
;   Ronetix GmbH
;
;   Supported devices   : Freescale i.MX6 SoloX
;   Supported board     : UDOO NEO
;
;   Revision            : 1.0
;
;   Date                : 17-Sep-2017
;
;
; The file is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;
;--------------------------------------------------------------------------

;--------------------------------------------------------------------------
; The following section contains licenses that are required for PEEDI to
; operate. These licenses must be filled before using this file.
; The [LICENSE] section may contain license keys for one or more PEEDIs.
;
;   Example:
;       [LICENSE]
;       KEY         = UPDATE_24MAY2013, 1111-1111-1111-1
;       KEY         = XXXXX, 2222-2222-2222-2
;
; The [LICENSE] section may point to an external file which contains
; license keys for one or more PEEDIs. The external file must include 
; the text [LICENSE] followed by all keys.
;
;   Example:
;		[LICENSE]
;		FILE = tftp://192.168.1.1/license.txt
;		or
;		FILE=eep:license.txt 
;		or 
;		FILE = ftp://user:password@192.168.1.1/license.txt
;
;
; PEEDI is shipped with license keys stored in "eep:license.txt" and 
; printed on a label on the bottom side of PEEDI.
;
[LICENSE]
FILE = eep:license.txt
;--------------------------------------------------------------------------

[DEBUGGER]
PROTOCOL            = gdb_remote    ; gdb remote
REMOTE_PORT         = 2000          ; TCP/IP port

[TARGET]
PLATFORM            = Cortex

[PLATFORM_Cortex]
JTAG_CHAIN          = 5, 4, 4, 4       ; list of TAP controllers in the JTAG chain
JTAG_CLOCK          = 12000    		; JTAG Clock in [kHz]
TRST_TYPE           = PUSHPULL      ; type of TRST output: OPENDRAIN or PUSHPULL
RESET_TIME          = 20           	; length of RESET pulse in ms
WAKEUP_TIME         = 20          	; delay after power up
TIME_AFTER_RESET	= 500			; delay after RST is released
VERBOSE_INFO 		= 1				; print info if CORE0_DEBUG_ADDR is not defined
CORE0               = CORTEX-A, 2, 0xBA00477
CORE0_DEBUG_ADDR	= 0x82150000	; Coresight debug component
CORE0_STARTUP_MODE  = RESET         ; stop the core immediately after reset
CORE0_ENDIAN        = LITTLE        ; core is little endian
CORE0_BREAKMODE     = SOFT          ; breakpoint mode
CORE0_INIT          = INIT_MX6
;CORE0_WORKSPACE    = 0x907000, 0x8000   	; OCRAM available without SD card
CORE0_WORKSPACE		= 0x007f8000, 0x10000 	; TCM available if SD card is inserted
CORE0_PATH  		= "tftp://192.168.3.60"
CORE0_FILE  		= "test.bin", BIN, 0x007f8000

CORE1               = CORTEX-M, 3
CORE1_APSEL			= 0
CORE1_RESET_MODE	= vectreset		; software reset: sysresetreq (default) or vectreset
CORE1_STARTUP_MODE  = RESET         ; stop the core immediately after reset
CORE1_ENDIAN        = LITTLE        ; core is little endian
CORE1_BREAKMODE     = SOFT          ; breakpoint mode
CORE1_INIT          = INIT_M4

[INIT_MX6]
set cpsr 0xd3
set pc 0

; In order to enable the M4 core use:
; run $m4
;
; Make sure the memory at 0x007f8000 is accessible!
;
; In order to check if M4 core is working:
; core 1
; step
; step
[m4]	; comment out this line for automatically enabling of M4 core
; prepare simple code for M4 (THUMB)
mem write	0x007f8000 0x00000100	; set SP
mem write	0x007f8004 0x00000010	; set PC
mem write	0x007f8008	0 2 

; label_1:
mem write16 0x007f8010	0x2456		; movs    r4, #86 	; 0x56
mem write16 0x007f8012	0x2578		; movs    r5, #120  ; 0x78
mem write16 0x007f8014	0xBF00		; nop
mem write16 0x007f8016	0xBF00		; nop
mem write16 0x007f8018	0x3301		; adds    r3, #1
mem write16 0x007f801a 	0xe7f9		; b.n 	 ; PC - 0x0A, goto label_1

mem write 0x20d8028 0x007f8000	; M4, PERSISTENT_ENTRY1, entry function
mem write 0x20d802c 0			; M4, PERSISTENT_ARG1, argument of entry function

m w 0x020D8000 0xA0480538       ; enable M4, enable warm reset, assert M4 reset                                         
m w 0x020D8000 0xA0480528		; release M4 reset

[INIT_M4]
set xpsr 0x01000000		; without setting of xpsr the core doesn't run/step
set lr 0x1234			; point to valid memory to avoid problems with Eclipse
set pc 0x10


[SERIAL]                            ; serial port configuration
BAUD            = 115200
STOP_BITS       = 1
PARITY          = NONE
TCP_PORT        = 0

[TELNET]
PROMPT          = "imx6sx> "         ; telnet prompt

[DISPLAY]
BRIGHTNESS      = 20                ; LED indicator brightness
VOLUME          = 25                ; beeper volume

[ACTIONS]                           ; user defined scripts
;AUTORUN        = 1                 ; executed on every target connect
1 = erase
2 = prog

[erase]                             ; erase flash
echo "flash erase"

[prog]                              ; program flash
echo "flash prog"