;------------------------------------------------------------------------------- ; ; ns7520.cfg ; ---------- ; ; PEEDI target configuration file for NS7520 processor ; ; ; Ronetix ; ; Supported devices : NS7520 ; Board : Digi Connect 7u ; Revision : 1.0 ; ; Date : Feb 26, 2007 ; ; The software is delivered "AS IS" without warranty or condition of any ; kind, either express, implied or statutory. This includes without ; limitation any warranty or condition with respect to merchantability or ; fitness for any particular purpose, or against the infringements of ; intellectual property rights of others. ; ;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ; The following section contains licenses that are required for PEEDI to ; operate. These licenses must be filled before using this file. ; The [LICENSE] section may contain license keys for one or more PEEDIs. ; ; Example: ; [LICENSE] ; KEY = UPDATE_24MAY2010, 1111-1111-1111-1 ; KEY = XXXXX, 2222-2222-2222-2 ; ; The [LICENSE] section may point to an external file which contains ; license keys for one or more PEEDIs. The external file must include ; the text [LICENSE] followed by all keys. ; ; Example: ; [LICENSE] ; FILE = tftp://192.168.3.1/license.txt ; or ; FILE=eep:license.txt ; or ; FILE = ftp://user:password@192.168.3.1/license.txt ; ; ; PEEDI is shipped with license keys stored in "eep:license.txt" and ; printed on a label on the bottom side of PEEDI. ; [LICENSE] FILE=eep:license.txt ;-------------------------------------------------------------------------- [DEBUGGER] PROTOCOL = gdb_remote ; gdb remote REMOTE_PORT = 2000 ; TCP/IP port [TARGET] PLATFORM = ARM ; platform is ARM [PLATFORM_ARM] JTAG_CHAIN = 4 ; list of IR lenght of all TAP controller in JTAG chain JTAG_CLOCK = 20, 25000 ; JTAG Clock in [kHz] - 10kHz jtag clock for init operations and 25MHz for normal work TRST_TYPE = PUSHPULL ; type of TRST output: OPENDRAIN or PUSHPULL RESET_TIME = 20 TIME_AFTER_RESET = 100 CORE = ARM7TDMI ; TAP is an ARM7 CORE_STARTUP_MODE = RESET CORE_BREAKMODE = soft ; breakpoint mode: ; soft - software breakpiont ; hard - use hardware breakpoints instead of software CORE_INIT = INIT_7U ; init section for LPC2138 board CORE_FLASH = FLASH_PROG ; flash section parameters CORE_ENDIAN = BIG CORE0_WORKSPACE_ADDR=0x0100 CORE0_WORKSPACE_LEN=0x10000 CORE0_PATH = "tftp://192.168.3.1" ; INIT ;----------- [INIT_7U] ; Set SCR for Big endian, full speed, 128 cycle Bus monitor memory write 0xffb00000 0x4004a000 ; Setup DRAM refresh circuit memory write 0xffc00000 0x29c00000 ; Disable CS2 memory write 0xffb00030 0x00000000 memory write 0xffc00034 0x00000000 memory write 0xffc00014 0xF3000774 ; The debugger script must clear the valid bit in CS0BAR. ; The ncc_init() routine looks at this bit to determine ; whether the unit is running under control of a debugger. memory write 0xffc00010 0x02000001 ; Configure CS1 for 16 Megs of SDRAM memory write 0xffc00020 0x0 memory write 0xffc00024 0xf3000170 memory write 0xffc00020 0x0000022d memory write 0xffc00028 0x00000001 ; Set the processor mode set cpsr 0xd3 [FLASH_PROG] CHIP= AM29LV641D ; flash chip ACCESS_METHOD=AGENT CHECK_ID=YES CHIP_WIDTH=16 CHIP_COUNT=1 BASE_ADDR=0x02000000 FILE= "digi_7u.bin", BIN, 0x02000000 ; file to program AUTO_ERASE = NO ; erase before program [SERIAL] ; serial port configuration BAUD = 115200 STOP_BITS = 1 PARITY = NONE TCP_PORT = 0; 2023 [TELNET] PROMPT = "ns7520> " ; telnet prompt ;BACKSPACE = 127 ; comment out for autodetect [DISPLAY] BRIGHTNESS = 20 ; LED indicator brightness VOLUME = 25 ; zummer volume [ACTIONS] ; user defined scripts 1 = erase 2 = prog 3 = dump_ram 4 = dump_flash [erase] ; erase flash flash erase [prog] ; program flash flash prog